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Charge Pump Regulator for Color TFT Panel ADM8830
FEATURES 3 Output Voltages (+5.1 V, +15.3 V, -10.2 V) from One 3 V Input Supply Power Efficiency Optimized for Use with TFT in Mobile Phones Low Quiescent Current Low Shutdown Current (<1 A) Fast Transient Response Shutdown Function Power Saving during Blanking Period Option to Use External LDO APPLICATIONS Handheld Instruments TFT LCD Panels Cellular Phones FUNCTIONAL BLOCK DIAGRAM
C5 2.2F VOLTAGE DOUBLER C1+ C1- VOUT CLKIN OSCILLATOR LDO VOLTAGE REGULATOR CONTROL LOGIC DOUBLE LDO IN C6 2.2F +5VOUT +5VIN C2+ C2- TIMING GENERATOR VOLTAGE TRIPLER SHDN SHUTDOWN CONTROL DISCHARGE VOLTAGE INVERTER TRIPLE C3+ C3- C2 1F C3 1F +15.3V C8 1F VCC
ADM8830
C1 2.2F
SCAN/BLANK LDO_ON/OFF
+5.1V C7 2.2F
+15VOUT C4+ C4- C4 1F
GENERAL DESCRIPTION
-10VOUT GND
The ADM8830 is a charge pump regulator used for color thin film transistor (TFT) liquid crystal displays (LCDs). Using charge pump technology, the device can be used to generate three output voltages (+5.1 V 2%, +15.3 V, -10.2 V) from a single 3 V input supply. These outputs are then used to provide supplies for the LCD controller (5.1 V) and the gate drives for the transistors in the panel (+15.3 V and -10.2 V). Only a few external capacitors are needed for the charge pumps. An efficient low dropout voltage regulator also ensures that the power efficiency is high and provides a low ripple 5.1 V output. This LDO can be shut down and an external LDO used to regulate the 5 V doubler output and drive the input to the charge pump section, which generates the +15.3 V and -10.2 V outputs if so required by the user. The ADM8830 has an internal 100 kHz oscillator for use in scanning mode, but the part must be clocked by an external clock source in blanking (low current) mode. The internal oscillator is used to clock the charge pumps during scanning mode where the current is highest. During blanking periods, the ADM8830 switches to use an external, lower frequency clock. This allows the user to vary the frequency and maximize power efficiency during blanking periods. The tolerances on the output voltages are
-10.2V C9 1F
seamlessly maintained when switching from scanning mode to blanking mode or vice versa. The ADM8830 has a number of power saving features, including low power shutdown and reduced quiescent current consumption during the blanking periods mentioned above. The 5.1 V output consumes the most power, so power efficiency is also maximized on this output with an oscillator enabling scheme (Green IdleTM). This effectively senses the load current that is flowing and turns on the charge pump only when charge needs to be delivered to the 5 V pump doubler output. The ADM8830 is fabricated using CMOS technology for minimal power consumption. The part is packaged in 20-lead LFCSP and TSSOP packages.
REV. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P Box 9106, Norwood, MA 02062-9106, U.S.A. .O. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) 2003 Analog Devices, Inc. All rights reserved.
ADM8830-SPECIFICATIONS
Parameter INPUT VOLTAGE, VCC SUPPLY CURRENT, ICC Min 2.6 150 70 Typ
(VCC = 2.6 V to 3.6 V, TA = -40C to +85C, unless otherwise noted, C1, C5, C6, C7 = 2.2 F, C2, C3, C4, C8, C9 = 1 F, CLKIN = 1 kHz in blanking mode.)
Max 3.6 400 140 1 5.2 5 8 200 Unit V A A A V mA mA A % % mV p-p s V A A mV p-p V A A mV p-p % % 140 kHz Unloaded, Scanning Period Unloaded, Blanking Period Shutdown Mode, TA = 25C IL = 10 A to 8 mA Scanning Period Scanning Period, VCC > 2.7 V Blanking Period VCC = 3 V, IL = 5 mA (Scanning) VCC = 3 V, IL = 200 A (Blanking) 8 mA Load IL Stepped from 10 A to 8 mA IL = 1 A to 100 A Scanning Period Blanking Period IL = 100 A IL = -1 A to -100 A Scanning Period Blanking Period IL = -100 A Relative to 5.1 V Output, IL = 100 A (Scanning) Relative to 5.1 V Output, IL =10 A (Blanking) Scanning Period Test Conditions
+5.1 V OUTPUT Output Voltage Output Current Power Efficiency Output Ripple Transient Response +15.3 V OUTPUT Output Voltage Output Current Output Ripple -10.2 V OUTPUT Output Voltage Output Current Output Ripple POWER EFFICIENCY (+15.3 V and -10.2 V Outputs) CHARGE PUMP FREQUENCY CONTROL PINS SHDN Input Voltage, VSHDN Digital Input Current Digital Input Capacitance* SCAN/BLANK Input Voltage Digital Input Current Digital Input Capacitance* LDO_ON/OFF Input Voltage Digital Input Current Digital Input Capacitance* CLKIN Minimum Frequency Input Voltage VIL VIH Digital Input Current Digital Input Capacitance*
5.0
5.1 4 5 50 80 70 10 5 15.3 50 1 50 -10.2 -50 -1 50 90 80
14.4
15.6 100 10
-10.4 -100 -10
-9.6
60
100
0.7 VCC
0.3 VCC 1 10 0.3 VCC 1 10 0.3 VCC 1 10 1 0.3 VCC 1 10
V V A pF V V A pF V V A pF kHz V V A pF
SHDN Low = Shutdown Mode SHDN High = Normal Mode
0.7 VCC
Low = BLANK Period High = SCAN Period
0.7 VCC
Low = External LDO High = Internal LDO
0.9 0.7 VCC
Duty Cycle = 50%, Rise/Fall Times = 20 ns
*Guaranteed by design. Not 100% production tested. Specifications are subject to change without notice.
-2-
REV. B
ADM8830 TIMING SPECIFICATIONS
Parameter POWER-UP SEQUENCE +5 V Rise Time, tR5V +15 V Rise Time, tR15V -10 V Fall Time, tF10V Delay between -10 V Fall and +15 V, tDELAY POWER-DOWN SEQUENCE +5 V Fall Time, tF5V +15 V Fall Time, tF15V -10 V Rise Time, tR10V
Specifications are subject to change without notice.
(VCC = 2.6 V to 3.6 V, TA = -40C to +85C, unless otherwise noted, C1, C5, C6, C7 = 2.2 F, C2, C3, C4, C8, C9 = 1 F, CLKIN = 1 kHz in blanking mode.)
Min Typ 300 8 12 3 75 40 40 Max Unit s ms ms ms ms ms ms Test Conditions 10% to 90%, Figure 2 10% to 90%, Figure 2 90% to 10%, Figure 2 Figure 2 90% to 10%, Figure 2 90% to 10%, Figure 2 10% to 90%, Figure 2
ABSOLUTE MAXIMUM RATINGS*
(TA = 25C, unless otherwise noted.)
THERMAL CHARACTERISTICS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +4.0 V Input Voltage to Digital Inputs . . . . . . . . . . . . . -0.3 V to +4.0 V Output Short Circuit Duration to GND . . . . . . . . . . . . . 10 sec Output Voltage +5.1 V Output . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +6 V -10.2 V Output . . . . . . . . . . . . . . . . . . . . . . . .-12 V to +0.3 V +15.3 V Output . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +17 V Operating Temperature Range . . . . . . . . . . . . -40C to +85C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.55 W (Derate 33 mW/C above 25C) Storage Temperature Range . . . . . . . . . . . . . -65C to +150C ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class I
*This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.
20-Lead TSSOP Package: JA = 72C/W 20-Lead LFCSP Package: JA = 31C/W
ORDERING GUIDE
Model ADM8830ACP ADM8830ACP-REEL7 ADM8830ARU ADM8830ARU-REEL ADM8830ARU-REEL7 EVAL-ADM8830EB
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Package Description Lead Frame Chip Scale Package Lead Frame Chip Scale Package Thin Shrink Small Outline Package Thin Shrink Small Outline Package Thin Shrink Small Outline Package Evaluation Board
Package Option CP-20-1 CP-20-1 RU-20 RU-20 RU-20
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADM8830 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
REV. B
-3-
ADM8830
PIN CONFIGURATIONS TSSOP
C1- 1 C1+ 2 VCC 3 VOUT 4 LDO_IN 5 +5VOUT 6 +5VIN 7 LDO_ON/OFF 8 SHDN 9 SCAN/BLANK 10
20 GND 19 -10VOUT 18 C4+ 17 C4-
LFCSP
20 C1+ 19 C1- 18 GND 17 -10VOUT 16 C4+ VCC 1 VOUT 2 LDO_IN 3 +5VOUT 4 +5VIN 5
PIN 1 INDICATOR
ADM8830
16 C2+
TOP VIEW 15 C2- (Not to Scale)
14 C3+ 13 C3- 12 +15VOUT 11 CLKIN
ADM8830
TOP VIEW
15 C4- 14 C2+ 13 C2- 12 C3+ 11 C3-
PIN FUNCTION DESCRIPTIONS
Pin Number TSSOP 1, 2 3 4 5 6 7 8 LFCSP 19, 20 1 2 3 4 5 6 Mnemonic C1-, C1+ VCC VOUT LDO_IN +5VOUT +5VIN LDO_ON/OFF Function External capacitor C1 is connected between these pins. A 2.2 F capacitor is recommended. Positive Supply Voltage Input. Connect this pin to 3 V supply with a 2.2 F decoupling capacitor. Voltage Doubler Output. This is derived by doubling the 3 V supply. A 2.2 F capacitor to ground is required on this pin. Voltage Regulator Input. The user has the option to bypass this circuit using the LDO_ON/OFF pin. +5.1 V Output Pin. This is derived by doubling and regulating the 3 V supply. A 2.2 F capacitor to ground is required on this pin to stabilize the regulator. +5.1 V Input Pin. This is the input to the voltage tripler and doubler inverter charge pump circuits. Control Logic Input. 3 V CMOS logic. A logic high selects the internal LDO for regulation of the 5 V voltage doubler output. A logic low isolates the internal LDO from the rest of the charge pump circuits. This allows the use of an external LDO to regulate the 5 V voltage doubler output. The output of this LDO is then fed back into the voltage tripler and doubler/inverter circuits of the ADM8830. Digital Input. 3 V CMOS logic. Active low shutdown control. This shuts down the timing generator and enables the discharge circuit to dissipate the charge on the voltage outputs, thus driving them to 0 V. Drive Mode Input. 3 V CMOS logic. A logic high places the part in scan (high current) mode and the charge pump is driven by the internal oscillator. A logic low places the part in blanking (low current) mode and the charge pump is driven by the (slower) external oscillator. This is a power saving feature on the ADM8830. External CLOCK Input. During a blanking period, the oscillator circuit selects this pin to drive the charge pump circuit. This is at a lower frequency than the internal oscillator, resulting in lower quiescent current consumption, thus saving power. +15.3 V Output Pin. This is derived by tripling the +5.1 V regulated output. A 1 F capacitor is required on this pin. External capacitor C3 is connected between these pins. A 1 F capacitor is recommended. External capacitor C2 is connected between these pins. A 1 F capacitor is recommended. External capacitor C4 is connected between these pins. A 1 F capacitor is recommended. -10.2 V Output Pin. This is derived by doubling and inverting the +5.1 V regulated output. A 1 F capacitor is required on this pin. Device Ground Pin. -4- REV. B
9
7
SHDN
10
8
SCAN/BLANK
11
9
CLKIN
12 13, 14 15, 16 17, 18 19 20
10 11, 12 13, 14 15, 16 17 18
+15VOUT C3-, C3+ C2-, C2+ C4-, C4+ -10VOUT GND
LDO_ON/OFF 6 SHDN 7 SCAN/BLANK 8 CLKIN 9 +15VOUT 10
Typical Performance Characteristics-ADM8830
80 70 LDO OUTPUT VOLTAGE - V 60 50 40 30 20 10 5.0752 5.0750 5.0748 LDO O/P - V 5.0746 5.0744 5.0742 5.0740 5.0738 5.0736 10 30 50 70 90 110 130 150 170 190 OUTPUT CURRENT - A 5.0734 100 1000 BLANKING FREQUENCY - Hz 10000 5.092 5.090 5.104 5.102 5.100 5.098 5.096 5.094 LDO POWER EFFICIENCY - %
0
1
2
3 5 4 ILOAD - mA
6
7
8
TPC 1. LDO Efficiency in Blanking Mode with VCC = 3 V
TPC 2. LDO Output Voltage (Unloaded) vs. Blanking Mode Frequency
TPC 3. LDO O/P Voltage vs. Load Current in Scanning Mode, VCC = 3.3 V
85 84
100
100 90 80 70 60 50 40
LDO POWER EFFICIENCY - %
+15V/-10V EFFICIENCY - %
83 82 81 80 79 78
90
80
70
0
1
3 5 2 4 6 OUTPUT CURRENT - mA
7
8
60
2
4 6 8 OUTPUT CURRENT - A
10
+15V/-10V EFFICIENCY - %
0
20 40 60 80 OUTPUT CURRENT - A
100
TPC 4. LDO Efficiency in Scanning Mode with VCC = 3 V
TPC 5. +15 V/-10 V Efficiency vs. Output Current in Blanking Mode, VCC = 3 V
TPC 6. +15 V/-10 V Efficiency vs. Output Current in Scanning Mode, VCC = 3 V
5.30 5.25 SUPPLY CURRENT - A 5.20 5.0V O/P - V 5.15 5.10 5.05 5.00 4.95 4.90 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 VCC - V DEVICE 1 @ +85C DEVICE 1 @ +25C
300 250 200 ICC (SCAN) 150 100 50 0 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 VCC - V 5V OUTPUT RIPPLE
VOUT
DEVICE 1 @ -40C
VCC RIPPLE ICC (BLANK)
TPC 7. LDO Variation over Supply and Temperature
TPC 8. Supply Current vs. Voltage
TPC 9. Output Ripple on LDO (5 V Output)
REV. B
-5-
ADM8830
LOAD DISABLE LOAD ENABLE +15V OUTPUT
5V OUTPUT
5V OUTPUT -10V OUTPUT 5VOUT
TPC 10. 5 V Output Transient Response for Maximum Load Current
TPC 11. 5 V Output Transient Response, Load Disconnected
TPC 12. +15 V and -10 V Outputs at Power-Up
20.1 +15V OUTPUT 20.0 DISSIPATED POWER - mW 19.9 19.8 19.7 19.6 19.5 19.4 -40
-10V OUTPUT
5VOUT
-20
60 40 0 20 TEMPERATURE - C
80
TPC 13. +15 V and -10 V Outputs at Power-Down (Unloaded)
TPC 14. Power Dissipation over Temperature, VCC = 3.6 V, Scanning Mode with All O/Ps at Maximum Load
-6-
REV. B
ADM8830
SCANNING AND BLANKING
A TFT LCD panel is essentially made up of a bank of capacitors, each representing a pixel in the display. These capacitors store different levels of charge, depending on the amount of luminescence required for a given pixel. When a picture is being displayed on the panel, a scan of all the pixel capacitors is performed, placing different levels of charge on each in order to create the image. The process of updating the display like this is called "scanning." Once scanned, an image will be held by pixel capacitance and the controller and source line drivers can be put into a low power mode. This low power mode is referred to as the blanking mode on the ADM8830. Over a finite period of time, this pixel charge will leak and the capacitors will have to be refreshed in order to maintain the image. The ADM8830 caters to the two modes of operation described above as follows. When the TFT LCD panel is in scanning mode, a logic high on the SCAN/BLANK input places the device in high current power mode, providing extra power (extra current) to the LCD controller and the source line drivers. If the panel continues to be updated (as when a moving picture is being displayed), then the ADM8830 can be continually operated in scanning mode. If the same image is kept on the panel, a logic low is applied to the SCAN/BLANK input and the ADM8830 enters blanking (low current) mode. Depending on how often the image is being updated, the ADM8830 can be operated with a variable SCAN/BLANK duty cycle. This helps to maximize power efficiency and therefore extends the battery life.
90%
VCC SHDN
t R5V
90% 10%
+5V
t F5V
t R15V t F15V t DELAY
+15V -10V
90% 10%
-3V
t R10V
LOAD SCAN/BLANK EXTERNAL CLOCK
t F10V
Figure 2. Power Sequence TRANSIENT RESPONSE
The ADM8830 features extremely fast transient response, making it very suitable for fast image updates on TFT LCD panels. This means that even under changing load conditions there is still very effective regulation of the 5 V output. TPCs 10 and 11 show how the 5.1 V output responds when a maximum load is dynamically connected and disconnected. Note that the output settles within 5 s to less than 1% of the output level.
EXTERNAL CLOCK
10%
tR tH
tF tT
tR: RISE TIME tF: FALL TIME tH @ 100% = DUTY CYCLE tT
The ADM8830 has an internal 100 kHz oscillator, but an external clock source can also be used to clock the part. This clock source must be applied to the CLKIN pin. Power is saved during blanking periods by disabling the internal oscillator and switching to the lower frequency external clock source. To achieve optimum performance of the charge pump circuitry, it is important that the duty cycle of the external clock source be 50% and that the rise and fall times be less than 20 ns.
0.28 3.10 0.4
Figure 1. Duty Cycle of External Clock POWER SEQUENCING
The gate drive supplies must be sequenced such that the -10 V supply is up before the +15 V supply for the TFT panel to power up correctly. The ADM8830 controls this sequence. When the device is turned on (a logic high on SHDN), the ADM8830 allows the -10 V output to ramp immediately but holds off the +15 V output. It continues to do this until the negative output has reached -3 V. At this point, the positive output is enabled and allowed to ramp up to +15 V. This sequence is highlighted in Figure 2.
0.75
0.9 0.25
0.5
1.95
2.10
SOLDER MASK BOARD METALLIZATION DIMENSIONS IN MILLIMETERS
0.2
0.25
Figure 3. Suggested LFCSP 4 mm 4 mm 20-Lead Land Pattern
REV. B
-7-
ADM8830
OUTLINE DIMENSIONS 20-Lead Thin Shrink Small Outline Package [TSSOP] (RU-20)
Dimensions shown in millimeters
6.60 6.50 6.40
20
11
4.50 4.40 4.30
1 10
6.40 BSC
PIN 1 0.65 BSC 0.15 0.05 0.30 COPLANARITY 0.19 0.10 1.20 MAX
0.20 0.09 8 0
SEATING PLANE
0.75 0.60 0.45
COMPLIANT TO JEDEC STANDARDS MO-153AC
20-Lead Lead Frame Chip Scale Package [LFCSP] 4 mm 4 mm Body (CP-20-1)
Dimensions shown in millimeters
4.0 BSC SQ 0.60 MAX PIN 1 INDICATOR
TOP VIEW
0.60 MAX
16 15
20
1
3.75 BSC SQ 0.75 0.55 0.35 0.05 MAX 0.02 NOM COPLANARITY 0.08
11 10
BOTTOM VIEW
6 5
2.25 2.10 SQ 1.95 0.25 MIN
1.00 0.85 0.80
12 MAX
0.80 MAX 0.65 TYP
0.30 0.23 0.18
SEATING PLANE
0.50 BSC
0.20 REF
Revision History
Location
COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-1
Page
10/03--Data Sheet changed from REV. A to REV. B.
Changes to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3/03--Data Sheet changed from REV. SpA to REV. A.
Edits to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Edits to TPC 12 and TPC 13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
11/02--Data Sheet changed from REV. 0 to REV. SpA.
Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Changes to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Changes to THERMAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Edits to captions of TPCs 2, 3, and 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Edits to caption of TPC 13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Added TPC 14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 -8- REV. B
C02565-0-10/03(B)

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